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CY74FCT652CTQCT  收发器 8Bit Registered Transceiver
  |  2 订单数量
单价
15.00  / PCS
发货方式
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 无需物流 (线下配送)
数量
 PCS
金额
合计 ¥15.00
 
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逻辑芯片
产品详情
型号CY74FCT652CTQCT
封装24-SSOP/QSOP
品牌Texas Instruments
年份16+
描述收发器 8-Bit Registered Transceiver
 规格书点击查看

 

CY74FCT652CTQCT Datasheet, PDF

Electronic Manufacturer Part no Datasheet Electronics Description
Texas Instruments
Texas Instruments
CY74FCT652CTQCT [Old version datasheet] 8-Bit Registered Transceiver
CY74FCT652CTQCT [Old version datasheet] 8-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
Texas Instruments
Texas Instruments
CY74FCT652CTSOC [Old version datasheet] 8-Bit Registered Transceiver
CY74FCT652CTSOC [Old version datasheet] 8-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
CY74FCT652CTSOCE4 [Old version datasheet] 8-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
CY74FCT652CTSOCG4 [Old version datasheet] 8-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
CY74FCT652CTSOCT [Old version datasheet] 8-Bit Registered Transceiver
CY74FCT652CTSOCT [Old version datasheet] 8-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
 

CY74FCT652CTQCT Datasheet, PDF More

 

Texas Instruments CY74FCT652ATQCT

The CY74FCT652T consists of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal storage registers. GAB and GBA\ inputs control the transceiver functions. Select-control (SAB and SBA) inputs select either real-time or stored-data transfer. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. A low input level selects real-time data, and a high input level selects stored data.

Data on the A or B data bus, or both, can be stored in the internal D-type flip-flops by low-to-high transitions of the appropriate clock (CPAB or CPBA) inputs, regardless of the select or enable levels of the control pins. When SAB and SBA are in the real-time transfer mode, it also is possible to store data without using the internal D-type flip-flops by simultaneously enabling GAB and GBA\. In this configuration, each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. View datasheet 

 

德克萨斯仪器cy74fct652atqct
的cy74fct652t由总线收发器电路,D型触发器,控制电路安排了多路传输数据从输入总线或直接从内部存储寄存器。GAB和GBA \输入控制收发功能。选择控制(SAB和SBA)输入选择实时或存储的数据传输。用于选择控制的电路消除了在存储和实时数据之间的过渡期间发生在多路复用器中的典型解码故障。低输入电平选择实时数据,高输入电平选择存储数据。
在A或B的数据总线,或两者的数据,可以存储在内部的D型触发器的低到高的转换适当的时钟(CPAB或CPBA)输入,无论选择或使控制引脚的水平。当SAB和SBA在实时传输模式,它还可以存储数据,而不使用内部的D型触发器的同时使GAB和GBA \。在这种配置中,每个输出增强其输入。因此,当两套总线线路的所有其他数据源处于高阻抗时,每一组总线仍然处于最后状态。
本装置部分电源关闭应用程序完全指定使用的电子迁移率。禁用的Ioff电路的输出,防止电流通过设备损坏回流时关机。查看数据表
 

 

 

 

¥ 15.00 (RMB)/PCS
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2017/3/10 15:36:47(时间)
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